Technologies for allocating resources across data centers

ABSTRACT

Technologies for allocating resources across data centers include a compute device to obtain resource utilization data indicative of a utilization of resources for a managed node to execute a workload. The compute device is also to determine whether a set of resources presently available to the managed node in a data center in which the compute device is located satisfies the resource utilization data. Additionally, the compute device is to allocate, in response to a determination that the set of resources presently available to the managed node does not satisfy the resource utilization data, a supplemental set of resources to the managed node. The supplemental set of resources are located in an off-premises data center that is different from the data center in which the compute device is located. Other embodiments are also described and claimed.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of priority to U.S. Non-Provisionalapplication Ser. No. 15/858,286, filed Dec. 29, 2017, which in turnclaims the benefit of and priority to U.S. Provisional PatentApplication No. 62/584,401, filed Nov. 10, 2017, and Indian ProvisionalPatent Application No. 201741030632, filed Aug. 30, 2017, the entirecontents of which are incorporated herein by reference in theirentirety.

BACKGROUND

Typically, in a group of compute devices assigned to collectivelyexecute a workload (e.g., an application) in a data center, the resourceutilization of the workload changes over time. For example, a workloadmay operate in a phase of relatively high memory usage and low processorusage, followed by a phase of relatively low memory usage and highprocessor usage. As such, an orchestrator server or other computerdevice that monitors the resource utilization of the workload mayselectively allocate and deallocate resources (e.g., memory, datastorage, processors, accelerator devices, etc.) to the group of computedevices as the workload transitions through the various phases. As such,the set of resources available to the workload may “burst” (e.g.,increase) and decrease on an as-needed basis. However, in a data centerin which multiple workloads are being executed concurrently, it ispossible for a workload to encounter a phase that needs a particularamount of resources in order to execute at a speed specified in aservice level agreement (e.g., an agreement between a customer of thedata center and the data center operator) that are unavailable, such aswhen those resources are presently allocated to the execution of anotherworkload in the data center.

BRIEF DESCRIPTION OF THE DRAWINGS

The concepts described herein are illustrated by way of example and notby way of limitation in the accompanying figures. For simplicity andclarity of illustration, elements illustrated in the figures are notnecessarily drawn to scale. Where considered appropriate, referencelabels have been repeated among the figures to indicate corresponding oranalogous elements.

FIG. 1 is a simplified diagram of at least one embodiment of a datacenter for executing workloads with disaggregated resources;

FIG. 2 is a simplified diagram of at least one embodiment of a pod ofthe data center of FIG. 1;

FIG. 3 is a perspective view of at least one embodiment of a rack thatmay be included in the pod of FIG. 2;

FIG. 4 is a side plan elevation view of the rack of FIG. 3;

FIG. 5 is a perspective view of the rack of FIG. 3 having a sled mountedtherein;

FIG. 6 is a is a simplified block diagram of at least one embodiment ofa top side of the sled of FIG. 5;

FIG. 7 is a simplified block diagram of at least one embodiment of abottom side of the sled of FIG. 6;

FIG. 8 is a simplified block diagram of at least one embodiment of acompute sled usable in the data center of FIG. 1;

FIG. 9 is a top perspective view of at least one embodiment of thecompute sled of FIG. 8;

FIG. 10 is a simplified block diagram of at least one embodiment of anaccelerator sled usable in the data center of FIG. 1;

FIG. 11 is a top perspective view of at least one embodiment of theaccelerator sled of FIG. 10;

FIG. 12 is a simplified block diagram of at least one embodiment of astorage sled usable in the data center of FIG. 1;

FIG. 13 is a top perspective view of at least one embodiment of thestorage sled of FIG. 12;

FIG. 14 is a simplified block diagram of at least one embodiment of amemory sled usable in the data center of FIG. 1; and

FIG. 15 is a simplified block diagram of a system that may beestablished within the data center of FIG. 1 to execute workloads withmanaged nodes composed of disaggregated resources.

FIG. 16 is a simplified block diagram of at least one embodiment of asystem for allocating resources across data centers;

FIG. 17 is a simplified block diagram of at least one embodiment of anorchestrator server of the system of FIG. 16;

FIG. 18 is a simplified block diagram of at least one embodiment of anenvironment that may be established by the orchestrator server of FIGS.16 and 17; and

FIGS. 19-21 are a simplified flow diagram of at least one embodiment ofa method for allocating resources across data centers that may beperformed by the orchestrator server of FIGS. 16 and 17.

DETAILED DESCRIPTION OF THE DRAWINGS

While the concepts of the present disclosure are susceptible to variousmodifications and alternative forms, specific embodiments thereof havebeen shown by way of example in the drawings and will be describedherein in detail. It should be understood, however, that there is nointent to limit the concepts of the present disclosure to the particularforms disclosed, but on the contrary, the intention is to cover allmodifications, equivalents, and alternatives consistent with the presentdisclosure and the appended claims.

References in the specification to “one embodiment,” “an embodiment,”“an illustrative embodiment,” etc., indicate that the embodimentdescribed may include a particular feature, structure, orcharacteristic, but every embodiment may or may not necessarily includethat particular feature, structure, or characteristic. Moreover, suchphrases are not necessarily referring to the same embodiment. Further,when a particular feature, structure, or characteristic is described inconnection with an embodiment, it is submitted that it is within theknowledge of one skilled in the art to effect such feature, structure,or characteristic in connection with other embodiments whether or notexplicitly described. Additionally, it should be appreciated that itemsincluded in a list in the form of “at least one A, B, and C” can mean(A); (B); (C); (A and B); (A and C); (B and C); or (A, B, and C).Similarly, items listed in the form of “at least one of A, B, or C” canmean (A); (B); (C); (A and B); (A and C); (B and C); or (A, B, and C).

The disclosed embodiments may be implemented, in some cases, inhardware, firmware, software, or any combination thereof. The disclosedembodiments may also be implemented as instructions carried by or storedon a transitory or non-transitory machine-readable (e.g.,computer-readable) storage medium, which may be read and executed by oneor more processors. A machine-readable storage medium may be embodied asany storage device, mechanism, or other physical structure for storingor transmitting information in a form readable by a machine (e.g., avolatile or non-volatile memory, a media disc, or other media device).

In the drawings, some structural or method features may be shown inspecific arrangements and/or orderings. However, it should beappreciated that such specific arrangements and/or orderings may not berequired. Rather, in some embodiments, such features may be arranged ina different manner and/or order than shown in the illustrative figures.Additionally, the inclusion of a structural or method feature in aparticular figure is not meant to imply that such feature is required inall embodiments and, in some embodiments, may not be included or may becombined with other features.

Referring now to FIG. 1, a data center 100 in which disaggregatedresources may cooperatively execute one or more workloads (e.g.,applications on behalf of customers) includes multiple pods 110, 120,130, 140, each of which includes one or more rows of racks. As describedin more detail herein, each rack houses multiple sleds, which each maybe embodied as a compute device, such as a server, that is primarilyequipped with a particular type of resource (e.g., memory devices, datastorage devices, accelerator devices, general purpose processors). Inthe illustrative embodiment, the sleds in each pod 110, 120, 130, 140are connected to multiple pod switches (e.g., switches that route datacommunications to and from sleds within the pod). The pod switches, inturn, connect with spine switches 150 that switch communications amongpods (e.g., the pods 110, 120, 130, 140) in the data center 100. In someembodiments, the sleds may be connected with a fabric using IntelOmni-Path technology. As described in more detail herein, resourceswithin sleds in the data center 100 may be allocated to a group(referred to herein as a “managed node”) containing resources from oneor more other sleds to be collectively utilized in the execution of aworkload. The workload can execute as if the resources belonging to themanaged node were located on the same sled. The resources in a managednode may even belong to sleds belonging to different racks, and even todifferent pods 110, 120, 130, 140. Some resources of a single sled maybe allocated to one managed node while other resources of the same sledare allocated to a different managed node (e.g., one processor assignedto one managed node and another processor of the same sled assigned to adifferent managed node). By disaggregating resources to sleds comprisedpredominantly of a single type of resource (e.g., compute sledscomprising primarily compute resources, memory sleds containingprimarily memory resources), and selectively allocating and deallocatingthe disaggregated resources to form a managed node assigned to execute aworkload, the data center 100 provides more efficient resource usageover typical data centers comprised of hyperconverged servers containingcompute, memory, storage and perhaps additional resources). As such, thedata center 100 may provide greater performance (e.g., throughput,operations per second, latency, etc.) than a typical data center thathas the same number of resources.

Referring now to FIG. 2, the pod 110, in the illustrative embodiment,includes a set of rows 200, 210, 220, 230 of racks 240. Each rack 240may house multiple sleds (e.g., sixteen sleds) and provide power anddata connections to the housed sleds, as described in more detailherein. In the illustrative embodiment, the racks in each row 200, 210,220, 230 are connected to multiple pod switches 250, 260. The pod switch250 includes a set of ports 252 to which the sleds of the racks of thepod 110 are connected and another set of ports 254 that connect the pod110 to the spine switches 150 to provide connectivity to other pods inthe data center 100. Similarly, the pod switch 260 includes a set ofports 262 to which the sleds of the racks of the pod 110 are connectedand a set of ports 264 that connect the pod 110 to the spine switches150. As such, the use of the pair of switches 250, 260 provides anamount of redundancy to the pod 110. For example, if either of theswitches 250, 260 fails, the sleds in the pod 110 may still maintaindata communication with the remainder of the data center 100 (e.g.,sleds of other pods) through the other switch 250, 260. Furthermore, inthe illustrative embodiment, the switches 150, 250, 260 may be embodiedas dual-mode optical switches, capable of routing both Ethernet protocolcommunications carrying Internet Protocol (IP) packets andcommunications according to a second, high-performance link-layerprotocol (e.g., Intel's Omni-Path Architecture's, Infiniband) viaoptical signaling media of an optical fabric.

It should be appreciated that each of the other pods 120, 130, 140 (aswell as any additional pods of the data center 100) may be similarlystructured as, and have components similar to, the pod 110 shown in anddescribed in regard to FIG. 2 (e.g., each pod may have rows of rackshousing multiple sleds as described above). Additionally, while two podswitches 250, 260 are shown, it should be understood that in otherembodiments, each pod 110, 120, 130, 140 may be connected to differentnumber of pod switches (e.g., providing even more failover capacity).

Referring now to FIGS. 3-5, each illustrative rack 240 of the datacenter 100 includes two elongated support posts 302, 304, which arearranged vertically. For example, the elongated support posts 302, 304may extend upwardly from a floor of the data center 100 when deployed.The rack 240 also includes one or more horizontal pairs 310 of elongatedsupport arms 312 (identified in FIG. 3 via a dashed ellipse) configuredto support a sled of the data center 100 as discussed below. Oneelongated support arm 312 of the pair of elongated support arms 312extends outwardly from the elongated support post 302 and the otherelongated support arm 312 extends outwardly from the elongated supportpost 304.

In the illustrative embodiments, each sled of the data center 100 isembodied as a chassis-less sled. That is, each sled has a chassis-lesscircuit board substrate on which physical resources (e.g., processors,memory, accelerators, storage, etc.) are mounted as discussed in moredetail below. As such, the rack 240 is configured to receive thechassis-less sleds. For example, each pair 310 of elongated support arms312 defines a sled slot 320 of the rack 240, which is configured toreceive a corresponding chassis-less sled. To do so, each illustrativeelongated support arm 312 includes a circuit board guide 330 configuredto receive the chassis-less circuit board substrate of the sled. Eachcircuit board guide 330 is secured to, or otherwise mounted to, a topside 332 of the corresponding elongated support arm 312. For example, inthe illustrative embodiment, each circuit board guide 330 is mounted ata distal end of the corresponding elongated support arm 312 relative tothe corresponding elongated support post 302, 304. For clarity of theFigures, not every circuit board guide 330 may be referenced in eachFigure.

Each circuit board guide 330 includes an inner wall that defines acircuit board slot 380 configured to receive the chassis-less circuitboard substrate of a sled 400 when the sled 400 is received in thecorresponding sled slot 320 of the rack 240. To do so, as shown in FIG.4, a user (or robot) aligns the chassis-less circuit board substrate ofan illustrative chassis-less sled 400 to a sled slot 320. The user, orrobot, may then slide the chassis-less circuit board substrate forwardinto the sled slot 320 such that each side edge 414 of the chassis-lesscircuit board substrate is received in a corresponding circuit boardslot 380 of the circuit board guides 330 of the pair 310 of elongatedsupport arms 312 that define the corresponding sled slot 320 as shown inFIG. 4. By having robotically accessible and robotically manipulablesleds comprising disaggregated resources, each type of resource can beupgraded independently of each other and at their own optimized refreshrate. Furthermore, the sleds are configured to blindly mate with powerand data communication cables in each rack 240, enhancing their abilityto be quickly removed, upgraded, reinstalled, and/or replaced. As such,in some embodiments, the data center 100 may operate (e.g., executeworkloads, undergo maintenance and/or upgrades, etc.) without humaninvolvement on the data center floor. In other embodiments, a human mayfacilitate one or more maintenance or upgrade operations in the datacenter 100.

It should be appreciated that each circuit board guide 330 is dualsided. That is, each circuit board guide 330 includes an inner wall thatdefines a circuit board slot 380 on each side of the circuit board guide330. In this way, each circuit board guide 330 can support achassis-less circuit board substrate on either side. As such, a singleadditional elongated support post may be added to the rack 240 to turnthe rack 240 into a two-rack solution that can hold twice as many sledslots 320 as shown in FIG. 3. The illustrative rack 240 includes sevenpairs 310 of elongated support arms 312 that define a correspondingseven sled slots 320, each configured to receive and support acorresponding sled 400 as discussed above. Of course, in otherembodiments, the rack 240 may include additional or fewer pairs 310 ofelongated support arms 312 (i.e., additional or fewer sled slots 320).It should be appreciated that because the sled 400 is chassis-less, thesled 400 may have an overall height that is different than typicalservers. As such, in some embodiments, the height of each sled slot 320may be shorter than the height of a typical server (e.g., shorter than asingle rank unit, “1U”). That is, the vertical distance between eachpair 310 of elongated support arms 312 may be less than a standard rackunit “1U.” Additionally, due to the relative decrease in height of thesled slots 320, the overall height of the rack 240 in some embodimentsmay be shorter than the height of traditional rack enclosures. Forexample, in some embodiments, each of the elongated support posts 302,304 may have a length of six feet or less. Again, in other embodiments,the rack 240 may have different dimensions. Further, it should beappreciated that the rack 240 does not include any walls, enclosures, orthe like. Rather, the rack 240 is an enclosure-less rack that is openedto the local environment. Of course, in some cases, an end plate may beattached to one of the elongated support posts 302, 304 in thosesituations in which the rack 240 forms an end-of-row rack in the datacenter 100.

In some embodiments, various interconnects may be routed upwardly ordownwardly through the elongated support posts 302, 304. To facilitatesuch routing, each elongated support post 302, 304 includes an innerwall that defines an inner chamber in which the interconnect may belocated. The interconnects routed through the elongated support posts302, 304 may be embodied as any type of interconnects including, but notlimited to, data or communication interconnects to provide communicationconnections to each sled slot 320, power interconnects to provide powerto each sled slot 320, and/or other types of interconnects.

The rack 240, in the illustrative embodiment, includes a supportplatform on which a corresponding optical data connector (not shown) ismounted. Each optical data connector is associated with a correspondingsled slot 320 and is configured to mate with an optical data connectorof a corresponding sled 400 when the sled 400 is received in thecorresponding sled slot 320. In some embodiments, optical connectionsbetween components (e.g., sleds, racks, and switches) in the data center100 are made with a blind mate optical connection. For example, a dooron each cable may prevent dust from contaminating the fiber inside thecable. In the process of connecting to a blind mate optical connectormechanism, the door is pushed open when the end of the cable enters theconnector mechanism. Subsequently, the optical fiber inside the cableenters a gel within the connector mechanism and the optical fiber of onecable comes into contact with the optical fiber of another cable withinthe gel inside the connector mechanism.

The illustrative rack 240 also includes a fan array 370 coupled to thecross-support arms of the rack 240. The fan array 370 includes one ormore rows of cooling fans 372, which are aligned in a horizontal linebetween the elongated support posts 302, 304. In the illustrativeembodiment, the fan array 370 includes a row of cooling fans 372 foreach sled slot 320 of the rack 240. As discussed above, each sled 400does not include any on-board cooling system in the illustrativeembodiment and, as such, the fan array 370 provides cooling for eachsled 400 received in the rack 240. Each rack 240, in the illustrativeembodiment, also includes a power supply associated with each sled slot320. Each power supply is secured to one of the elongated support arms312 of the pair 310 of elongated support arms 312 that define thecorresponding sled slot 320. For example, the rack 240 may include apower supply coupled or secured to each elongated support arm 312extending from the elongated support post 302. Each power supplyincludes a power connector configured to mate with a power connector ofthe sled 400 when the sled 400 is received in the corresponding sledslot 320. In the illustrative embodiment, the sled 400 does not includeany on-board power supply and, as such, the power supplies provided inthe rack 240 supply power to corresponding sleds 400 when mounted to therack 240.

Referring now to FIG. 6, the sled 400, in the illustrative embodiment,is configured to be mounted in a corresponding rack 240 of the datacenter 100 as discussed above. In some embodiments, each sled 400 may beoptimized or otherwise configured for performing particular tasks, suchas compute tasks, acceleration tasks, data storage tasks, etc. Forexample, the sled 400 may be embodied as a compute sled 800 as discussedbelow in regard to FIGS. 8-9, an accelerator sled 1000 as discussedbelow in regard to FIGS. 10-11, a storage sled 1200 as discussed belowin regard to FIGS. 12-13, or as a sled optimized or otherwise configuredto perform other specialized tasks, such as a memory sled 1400,discussed below in regard to FIG. 14.

As discussed above, the illustrative sled 400 includes a chassis-lesscircuit board substrate 602, which supports various physical resources(e.g., electrical components) mounted thereon. It should be appreciatedthat the circuit board substrate 602 is “chassis-less” in that the sled400 does not include a housing or enclosure. Rather, the chassis-lesscircuit board substrate 602 is open to the local environment. Thechassis-less circuit board substrate 602 may be formed from any materialcapable of supporting the various electrical components mounted thereon.For example, in an illustrative embodiment, the chassis-less circuitboard substrate 602 is formed from an FR-4 glass-reinforced epoxylaminate material. Of course, other materials may be used to form thechassis-less circuit board substrate 602 in other embodiments.

As discussed in more detail below, the chassis-less circuit boardsubstrate 602 includes multiple features that improve the thermalcooling characteristics of the various electrical components mounted onthe chassis-less circuit board substrate 602. As discussed, thechassis-less circuit board substrate 602 does not include a housing orenclosure, which may improve the airflow over the electrical componentsof the sled 400 by reducing those structures that may inhibit air flow.For example, because the chassis-less circuit board substrate 602 is notpositioned in an individual housing or enclosure, there is no backplane(e.g., a backplate of the chassis) to the chassis-less circuit boardsubstrate 602, which could inhibit air flow across the electricalcomponents. Additionally, the chassis-less circuit board substrate 602has a geometric shape configured to reduce the length of the airflowpath across the electrical components mounted to the chassis-lesscircuit board substrate 602. For example, the illustrative chassis-lesscircuit board substrate 602 has a width 604 that is greater than a depth606 of the chassis-less circuit board substrate 602. In one particularembodiment, for example, the chassis-less circuit board substrate 602has a width of about 21 inches and a depth of about 9 inches, comparedto a typical server that has a width of about 17 inches and a depth ofabout 39 inches. As such, an airflow path 608 that extends from a frontedge 610 of the chassis-less circuit board substrate 602 toward a rearedge 612 has a shorter distance relative to typical servers, which mayimprove the thermal cooling characteristics of the sled 400.Furthermore, although not illustrated in FIG. 6, the various physicalresources mounted to the chassis-less circuit board substrate 602 aremounted in corresponding locations such that no two substantivelyheat-producing electrical components shadow each other as discussed inmore detail below. That is, no two electrical components, which produceappreciable heat during operation (i.e., greater than a nominal heatsufficient enough to adversely impact the cooling of another electricalcomponent), are mounted to the chassis-less circuit board substrate 602linearly in-line with each other along the direction of the airflow path608 (i.e., along a direction extending from the front edge 610 towardthe rear edge 612 of the chassis-less circuit board substrate 602).

As discussed above, the illustrative sled 400 includes one or morephysical resources 620 mounted to a top side 650 of the chassis-lesscircuit board substrate 602. Although two physical resources 620 areshown in FIG. 6, it should be appreciated that the sled 400 may includeone, two, or more physical resources 620 in other embodiments. Thephysical resources 620 may be embodied as any type of processor,controller, or other compute circuit capable of performing various taskssuch as compute functions and/or controlling the functions of the sled400 depending on, for example, the type or intended functionality of thesled 400. For example, as discussed in more detail below, the physicalresources 620 may be embodied as high-performance processors inembodiments in which the sled 400 is embodied as a compute sled, asaccelerator co-processors or circuits in embodiments in which the sled400 is embodied as an accelerator sled, storage controllers inembodiments in which the sled 400 is embodied as a storage sled, or aset of memory devices in embodiments in which the sled 400 is embodiedas a memory sled.

The sled 400 also includes one or more additional physical resources 630mounted to the top side 650 of the chassis-less circuit board substrate602. In the illustrative embodiment, the additional physical resourcesinclude a network interface controller (NIC) as discussed in more detailbelow. Of course, depending on the type and functionality of the sled400, the physical resources 630 may include additional or otherelectrical components, circuits, and/or devices in other embodiments.

The physical resources 620 are communicatively coupled to the physicalresources 630 via an input/output (I/O) subsystem 622. The I/O subsystem622 may be embodied as circuitry and/or components to facilitateinput/output operations with the physical resources 620, the physicalresources 630, and/or other components of the sled 400. For example, theI/O subsystem 622 may be embodied as, or otherwise include, memorycontroller hubs, input/output control hubs, integrated sensor hubs,firmware devices, communication links (e.g., point-to-point links, buslinks, wires, cables, light guides, printed circuit board traces, etc.),and/or other components and subsystems to facilitate the input/outputoperations. In the illustrative embodiment, the I/O subsystem 622 isembodied as, or otherwise includes, a double data rate 4 (DDR4) data busor a DDR5 data bus.

In some embodiments, the sled 400 may also include aresource-to-resource interconnect 624. The resource-to-resourceinterconnect 624 may be embodied as any type of communicationinterconnect capable of facilitating resource-to-resourcecommunications. In the illustrative embodiment, the resource-to-resourceinterconnect 624 is embodied as a high-speed point-to-point interconnect(e.g., faster than the I/O subsystem 622). For example, theresource-to-resource interconnect 624 may be embodied as a QuickPathInterconnect (QPI), an UltraPath Interconnect (UPI), or other high-speedpoint-to-point interconnect dedicated to resource-to-resourcecommunications.

The sled 400 also includes a power connector 640 configured to mate witha corresponding power connector of the rack 240 when the sled 400 ismounted in the corresponding rack 240. The sled 400 receives power froma power supply of the rack 240 via the power connector 640 to supplypower to the various electrical components of the sled 400. That is, thesled 400 does not include any local power supply (i.e., an on-boardpower supply) to provide power to the electrical components of the sled400. The exclusion of a local or on-board power supply facilitates thereduction in the overall footprint of the chassis-less circuit boardsubstrate 602, which may increase the thermal cooling characteristics ofthe various electrical components mounted on the chassis-less circuitboard substrate 602 as discussed above. In some embodiments, power isprovided to the processors 820 through vias directly under theprocessors 820 (e.g., through the bottom side 750 of the chassis-lesscircuit board substrate 602), providing an increased thermal budget,additional current and/or voltage, and better voltage control overtypical boards.

In some embodiments, the sled 400 may also include mounting features 642configured to mate with a mounting arm, or other structure, of a robotto facilitate the placement of the sled 600 in a rack 240 by the robot.The mounting features 642 may be embodied as any type of physicalstructures that allow the robot to grasp the sled 400 without damagingthe chassis-less circuit board substrate 602 or the electricalcomponents mounted thereto. For example, in some embodiments, themounting features 642 may be embodied as non-conductive pads attached tothe chassis-less circuit board substrate 602. In other embodiments, themounting features may be embodied as brackets, braces, or other similarstructures attached to the chassis-less circuit board substrate 602. Theparticular number, shape, size, and/or make-up of the mounting feature642 may depend on the design of the robot configured to manage the sled400.

Referring now to FIG. 7, in addition to the physical resources 630mounted on the top side 650 of the chassis-less circuit board substrate602, the sled 400 also includes one or more memory devices 720 mountedto a bottom side 750 of the chassis-less circuit board substrate 602.That is, the chassis-less circuit board substrate 602 is embodied as adouble-sided circuit board. The physical resources 620 arecommunicatively coupled to the memory devices 720 via the I/O subsystem622. For example, the physical resources 620 and the memory devices 720may be communicatively coupled by one or more vias extending through thechassis-less circuit board substrate 602. Each physical resource 620 maybe communicatively coupled to a different set of one or more memorydevices 720 in some embodiments. Alternatively, in other embodiments,each physical resource 620 may be communicatively coupled to each memorydevices 720.

The memory devices 720 may be embodied as any type of memory devicecapable of storing data for the physical resources 620 during operationof the sled 400, such as any type of volatile (e.g., dynamic randomaccess memory (DRAM), etc.) or non-volatile memory. Volatile memory maybe a storage medium that requires power to maintain the state of datastored by the medium. Non-limiting examples of volatile memory mayinclude various types of random access memory (RAM), such as dynamicrandom access memory (DRAM) or static random access memory (SRAM). Oneparticular type of DRAM that may be used in a memory module issynchronous dynamic random access memory (SDRAM). In particularembodiments, DRAM of a memory component may comply with a standardpromulgated by JEDEC, such as JESD79F for DDR SDRAM, JESD79-2F for DDR2SDRAM, JESD79-3F for DDR3 SDRAM, JESD79-4A for DDR4 SDRAM, JESD209 forLow Power DDR (LPDDR), JESD209-2 for LPDDR2, JESD209-3 for LPDDR3, andJESD209-4 for LPDDR4 (these standards are available at www.jedec.org).Such standards (and similar standards) may be referred to as DDR-basedstandards and communication interfaces of the storage devices thatimplement such standards may be referred to as DDR-based interfaces.

In one embodiment, the memory device is a block addressable memorydevice, such as those based on NAND or NOR technologies. A memory devicemay also include next-generation nonvolatile devices, such as Intel 3DXPoint™ memory or other byte addressable write-in-place nonvolatilememory devices. In one embodiment, the memory device may be or mayinclude memory devices that use chalcogenide glass, multi-thresholdlevel NAND flash memory, NOR flash memory, single or multi-level PhaseChange Memory (PCM), a resistive memory, nanowire memory, ferroelectrictransistor random access memory (FeTRAM), anti-ferroelectric memory,magnetoresistive random access memory (MRAM) memory that incorporatesmemristor technology, resistive memory including the metal oxide base,the oxygen vacancy base and the conductive bridge Random Access Memory(CB-RAM), or spin transfer torque (STT)-MRAM, a spintronic magneticjunction memory based device, a magnetic tunneling junction (MTJ) baseddevice, a DW (Domain Wall) and SOT (Spin Orbit Transfer) based device, athyristor based memory device, or a combination of any of the above, orother memory. The memory device may refer to the die itself and/or to apackaged memory product. In some embodiments, the memory device maycomprise a transistor-less stackable cross point architecture in whichmemory cells sit at the intersection of word lines and bit lines and areindividually addressable and in which bit storage is based on a changein bulk resistance.

Referring now to FIG. 8, in some embodiments, the sled 400 may beembodied as a compute sled 800. The compute sled 800 is optimized, orotherwise configured, to perform compute tasks. Of course, as discussedabove, the compute sled 800 may rely on other sleds, such asacceleration sleds and/or storage sleds, to perform such compute tasks.The compute sled 800 includes various physical resources (e.g.,electrical components) similar to the physical resources of the sled400, which have been identified in FIG. 8 using the same referencenumbers. The description of such components provided above in regard toFIGS. 6 and 7 applies to the corresponding components of the computesled 800 and is not repeated herein for clarity of the description ofthe compute sled 800.

In the illustrative compute sled 800, the physical resources 620 areembodied as processors 820. Although only two processors 820 are shownin FIG. 8, it should be appreciated that the compute sled 800 mayinclude additional processors 820 in other embodiments. Illustratively,the processors 820 are embodied as high-performance processors 820 andmay be configured to operate at a relatively high power rating. Althoughthe processors 820 generate additional heat operating at power ratingsgreater than typical processors (which operate at around 155-230 W), theenhanced thermal cooling characteristics of the chassis-less circuitboard substrate 602 discussed above facilitate the higher poweroperation. For example, in the illustrative embodiment, the processors820 are configured to operate at a power rating of at least 250 W. Insome embodiments, the processors 820 may be configured to operate at apower rating of at least 350 W.

In some embodiments, the compute sled 800 may also include aprocessor-to-processor interconnect 842. Similar to theresource-to-resource interconnect 624 of the sled 400 discussed above,the processor-to-processor interconnect 842 may be embodied as any typeof communication interconnect capable of facilitatingprocessor-to-processor interconnect 842 communications. In theillustrative embodiment, the processor-to-processor interconnect 842 isembodied as a high-speed point-to-point interconnect (e.g., faster thanthe I/O subsystem 622). For example, the processor-to-processorinterconnect 842 may be embodied as a QuickPath Interconnect (QPI), anUltraPath Interconnect (UPI), or other high-speed point-to-pointinterconnect dedicated to processor-to-processor communications.

The compute sled 800 also includes a communication circuit 830. Theillustrative communication circuit 830 includes a network interfacecontroller (NIC) 832, which may also be referred to as a host fabricinterface (HFI). The NIC 832 may be embodied as, or otherwise include,any type of integrated circuit, discrete circuits, controller chips,chipsets, add-in-boards, daughtercards, network interface cards, otherdevices that may be used by the compute sled 800 to connect with anothercompute device (e.g., with other sleds 400). In some embodiments, theNIC 832 may be embodied as part of a system-on-a-chip (SoC) thatincludes one or more processors, or included on a multichip package thatalso contains one or more processors. In some embodiments, the NIC 832may include a local processor (not shown) and/or a local memory (notshown) that are both local to the NIC 832. In such embodiments, thelocal processor of the NIC 832 may be capable of performing one or moreof the functions of the processors 820. Additionally or alternatively,in such embodiments, the local memory of the NIC 832 may be integratedinto one or more components of the compute sled at the board level,socket level, chip level, and/or other levels.

The communication circuit 830 is communicatively coupled to an opticaldata connector 834. The optical data connector 834 is configured to matewith a corresponding optical data connector of the rack 240 when thecompute sled 800 is mounted in the rack 240. Illustratively, the opticaldata connector 834 includes a plurality of optical fibers which leadfrom a mating surface of the optical data connector 834 to an opticaltransceiver 836. The optical transceiver 836 is configured to convertincoming optical signals from the rack-side optical data connector toelectrical signals and to convert electrical signals to outgoing opticalsignals to the rack-side optical data connector. Although shown asforming part of the optical data connector 834 in the illustrativeembodiment, the optical transceiver 836 may form a portion of thecommunication circuit 830 in other embodiments.

In some embodiments, the compute sled 800 may also include an expansionconnector 840. In such embodiments, the expansion connector 840 isconfigured to mate with a corresponding connector of an expansionchassis-less circuit board substrate to provide additional physicalresources to the compute sled 800. The additional physical resources maybe used, for example, by the processors 820 during operation of thecompute sled 800. The expansion chassis-less circuit board substrate maybe substantially similar to the chassis-less circuit board substrate 602discussed above and may include various electrical components mountedthereto. The particular electrical components mounted to the expansionchassis-less circuit board substrate may depend on the intendedfunctionality of the expansion chassis-less circuit board substrate. Forexample, the expansion chassis-less circuit board substrate may provideadditional compute resources, memory resources, and/or storageresources. As such, the additional physical resources of the expansionchassis-less circuit board substrate may include, but is not limited to,processors, memory devices, storage devices, and/or accelerator circuitsincluding, for example, field programmable gate arrays (FPGA),application-specific integrated circuits (ASICs), securityco-processors, graphics processing units (GPUs), machine learningcircuits, or other specialized processors, controllers, devices, and/orcircuits.

Referring now to FIG. 9, an illustrative embodiment of the compute sled800 is shown. As shown, the processors 820, communication circuit 830,and optical data connector 834 are mounted to the top side 650 of thechassis-less circuit board substrate 602. Any suitable attachment ormounting technology may be used to mount the physical resources of thecompute sled 800 to the chassis-less circuit board substrate 602. Forexample, the various physical resources may be mounted in correspondingsockets (e.g., a processor socket), holders, or brackets. In some cases,some of the electrical components may be directly mounted to thechassis-less circuit board substrate 602 via soldering or similartechniques.

As discussed above, the individual processors 820 and communicationcircuit 830 are mounted to the top side 650 of the chassis-less circuitboard substrate 602 such that no two heat-producing, electricalcomponents shadow each other. In the illustrative embodiment, theprocessors 820 and communication circuit 830 are mounted incorresponding locations on the top side 650 of the chassis-less circuitboard substrate 602 such that no two of those physical resources arelinearly in-line with others along the direction of the airflow path608. It should be appreciated that, although the optical data connector834 is in-line with the communication circuit 830, the optical dataconnector 834 produces no or nominal heat during operation.

The memory devices 720 of the compute sled 800 are mounted to the bottomside 750 of the of the chassis-less circuit board substrate 602 asdiscussed above in regard to the sled 400. Although mounted to thebottom side 750, the memory devices 720 are communicatively coupled tothe processors 820 located on the top side 650 via the I/O subsystem622. Because the chassis-less circuit board substrate 602 is embodied asa double-sided circuit board, the memory devices 720 and the processors820 may be communicatively coupled by one or more vias, connectors, orother mechanisms extending through the chassis-less circuit boardsubstrate 602. Of course, each processor 820 may be communicativelycoupled to a different set of one or more memory devices 720 in someembodiments. Alternatively, in other embodiments, each processor 820 maybe communicatively coupled to each memory device 720. In someembodiments, the memory devices 720 may be mounted to one or more memorymezzanines on the bottom side of the chassis-less circuit boardsubstrate 602 and may interconnect with a corresponding processor 820through a ball-grid array.

Each of the processors 820 includes a heatsink 850 secured thereto. Dueto the mounting of the memory devices 720 to the bottom side 750 of thechassis-less circuit board substrate 602 (as well as the verticalspacing of the sleds 400 in the corresponding rack 240), the top side650 of the chassis-less circuit board substrate 602 includes additional“free” area or space that facilitates the use of heatsinks 850 having alarger size relative to traditional heatsinks used in typical servers.Additionally, due to the improved thermal cooling characteristics of thechassis-less circuit board substrate 602, none of the processorheatsinks 850 include cooling fans attached thereto. That is, each ofthe heatsinks 850 is embodied as a fan-less heatsinks.

Referring now to FIG. 10, in some embodiments, the sled 400 may beembodied as an accelerator sled 1000. The accelerator sled 1000 isoptimized, or otherwise configured, to perform specialized computetasks, such as machine learning, encryption, hashing, or othercomputational-intensive task. In some embodiments, for example, acompute sled 800 may offload tasks to the accelerator sled 1000 duringoperation. The accelerator sled 1000 includes various components similarto components of the sled 400 and/or compute sled 800, which have beenidentified in FIG. 10 using the same reference numbers. The descriptionof such components provided above in regard to FIGS. 6, 7, and 8 applyto the corresponding components of the accelerator sled 1000 and is notrepeated herein for clarity of the description of the accelerator sled1000.

In the illustrative accelerator sled 1000, the physical resources 620are embodied as accelerator circuits 1020. Although only two acceleratorcircuits 1020 are shown in FIG. 10, it should be appreciated that theaccelerator sled 1000 may include additional accelerator circuits 1020in other embodiments. For example, as shown in FIG. 11, the acceleratorsled 1000 may include four accelerator circuits 1020 in someembodiments. The accelerator circuits 1020 may be embodied as any typeof processor, co-processor, compute circuit, or other device capable ofperforming compute or processing operations. For example, theaccelerator circuits 1020 may be embodied as, for example, fieldprogrammable gate arrays (FPGA), application-specific integratedcircuits (ASICs), security co-processors, graphics processing units(GPUs), machine learning circuits, or other specialized processors,controllers, devices, and/or circuits.

In some embodiments, the accelerator sled 1000 may also include anaccelerator-to-accelerator interconnect 1042. Similar to theresource-to-resource interconnect 624 of the sled 600 discussed above,the accelerator-to-accelerator interconnect 1042 may be embodied as anytype of communication interconnect capable of facilitatingaccelerator-to-accelerator communications. In the illustrativeembodiment, the accelerator-to-accelerator interconnect 1042 is embodiedas a high-speed point-to-point interconnect (e.g., faster than the I/Osubsystem 622). For example, the accelerator-to-accelerator interconnect1042 may be embodied as a QuickPath Interconnect (QPI), an UltraPathInterconnect (UPI), or other high-speed point-to-point interconnectdedicated to processor-to-processor communications. In some embodiments,the accelerator circuits 1020 may be daisy-chained with a primaryaccelerator circuit 1020 connected to the NIC 832 and memory 720 throughthe I/O subsystem 622 and a secondary accelerator circuit 1020 connectedto the NIC 832 and memory 720 through a primary accelerator circuit1020.

Referring now to FIG. 11, an illustrative embodiment of the acceleratorsled 1000 is shown. As discussed above, the accelerator circuits 1020,communication circuit 830, and optical data connector 834 are mounted tothe top side 650 of the chassis-less circuit board substrate 602. Again,the individual accelerator circuits 1020 and communication circuit 830are mounted to the top side 650 of the chassis-less circuit boardsubstrate 602 such that no two heat-producing, electrical componentsshadow each other as discussed above. The memory devices 720 of theaccelerator sled 1000 are mounted to the bottom side 750 of the of thechassis-less circuit board substrate 602 as discussed above in regard tothe sled 600. Although mounted to the bottom side 750, the memorydevices 720 are communicatively coupled to the accelerator circuits 1020located on the top side 650 via the I/O subsystem 622 (e.g., throughvias). Further, each of the accelerator circuits 1020 may include aheatsink 1070 that is larger than a traditional heatsink used in aserver. As discussed above with reference to the heatsinks 870, theheatsinks 1070 may be larger than tradition heatsinks because of the“free” area provided by the memory devices 750 being located on thebottom side 750 of the chassis-less circuit board substrate 602 ratherthan on the top side 650.

Referring now to FIG. 12, in some embodiments, the sled 400 may beembodied as a storage sled 1200. The storage sled 1200 is optimized, orotherwise configured, to store data in a data storage 1250 local to thestorage sled 1200. For example, during operation, a compute sled 800 oran accelerator sled 1000 may store and retrieve data from the datastorage 1250 of the storage sled 1200. The storage sled 1200 includesvarious components similar to components of the sled 400 and/or thecompute sled 800, which have been identified in FIG. 12 using the samereference numbers. The description of such components provided above inregard to FIGS. 6, 7, and 8 apply to the corresponding components of thestorage sled 1200 and is not repeated herein for clarity of thedescription of the storage sled 1200.

In the illustrative storage sled 1200, the physical resources 620 areembodied as storage controllers 1220. Although only two storagecontrollers 1220 are shown in FIG. 12, it should be appreciated that thestorage sled 1200 may include additional storage controllers 1220 inother embodiments. The storage controllers 1220 may be embodied as anytype of processor, controller, or control circuit capable of controllingthe storage and retrieval of data into the data storage 1250 based onrequests received via the communication circuit 830. In the illustrativeembodiment, the storage controllers 1220 are embodied as relativelylow-power processors or controllers. For example, in some embodiments,the storage controllers 1220 may be configured to operate at a powerrating of about 75 watts.

In some embodiments, the storage sled 1200 may also include acontroller-to-controller interconnect 1242. Similar to theresource-to-resource interconnect 624 of the sled 400 discussed above,the controller-to-controller interconnect 1242 may be embodied as anytype of communication interconnect capable of facilitatingcontroller-to-controller communications. In the illustrative embodiment,the controller-to-controller interconnect 1242 is embodied as ahigh-speed point-to-point interconnect (e.g., faster than the I/Osubsystem 622). For example, the controller-to-controller interconnect1242 may be embodied as a QuickPath Interconnect (QPI), an UltraPathInterconnect (UPI), or other high-speed point-to-point interconnectdedicated to processor-to-processor communications.

Referring now to FIG. 13, an illustrative embodiment of the storage sled1200 is shown. In the illustrative embodiment, the data storage 1250 isembodied as, or otherwise includes, a storage cage 1252 configured tohouse one or more solid state drives (SSDs) 1254. To do so, the storagecage 1252 includes a number of mounting slots 1256, each of which isconfigured to receive a corresponding solid state drive 1254. Each ofthe mounting slots 1256 includes a number of drive guides 1258 thatcooperate to define an access opening 1260 of the corresponding mountingslot 1256. The storage cage 1252 is secured to the chassis-less circuitboard substrate 602 such that the access openings face away from (i.e.,toward the front of) the chassis-less circuit board substrate 602. Assuch, solid state drives 1254 are accessible while the storage sled 1200is mounted in a corresponding rack 204. For example, a solid state drive1254 may be swapped out of a rack 240 (e.g., via a robot) while thestorage sled 1200 remains mounted in the corresponding rack 240.

The storage cage 1252 illustratively includes sixteen mounting slots1256 and is capable of mounting and storing sixteen solid state drives1254. Of course, the storage cage 1252 may be configured to storeadditional or fewer solid state drives 1254 in other embodiments.Additionally, in the illustrative embodiment, the solid state driversare mounted vertically in the storage cage 1252, but may be mounted inthe storage cage 1252 in a different orientation in other embodiments.Each solid state drive 1254 may be embodied as any type of data storagedevice capable of storing long term data. To do so, the solid statedrives 1254 may include volatile and non-volatile memory devicesdiscussed above.

As shown in FIG. 13, the storage controllers 1220, the communicationcircuit 830, and the optical data connector 834 are illustrativelymounted to the top side 650 of the chassis-less circuit board substrate602. Again, as discussed above, any suitable attachment or mountingtechnology may be used to mount the electrical components of the storagesled 1200 to the chassis-less circuit board substrate 602 including, forexample, sockets (e.g., a processor socket), holders, brackets, solderedconnections, and/or other mounting or securing techniques.

As discussed above, the individual storage controllers 1220 and thecommunication circuit 830 are mounted to the top side 650 of thechassis-less circuit board substrate 602 such that no twoheat-producing, electrical components shadow each other. For example,the storage controllers 1220 and the communication circuit 830 aremounted in corresponding locations on the top side 650 of thechassis-less circuit board substrate 602 such that no two of thoseelectrical components are linearly in-line with other along thedirection of the airflow path 608.

The memory devices 720 of the storage sled 1200 are mounted to thebottom side 750 of the of the chassis-less circuit board substrate 602as discussed above in regard to the sled 400. Although mounted to thebottom side 750, the memory devices 720 are communicatively coupled tothe storage controllers 1220 located on the top side 650 via the I/Osubsystem 622. Again, because the chassis-less circuit board substrate602 is embodied as a double-sided circuit board, the memory devices 720and the storage controllers 1220 may be communicatively coupled by oneor more vias, connectors, or other mechanisms extending through thechassis-less circuit board substrate 602. Each of the storagecontrollers 1220 includes a heatsink 1270 secured thereto. As discussedabove, due to the improved thermal cooling characteristics of thechassis-less circuit board substrate 602 of the storage sled 1200, noneof the heatsinks 1270 include cooling fans attached thereto. That is,each of the heatsinks 1270 is embodied as a fan-less heatsink.

Referring now to FIG. 14, in some embodiments, the sled 400 may beembodied as a memory sled 1400. The storage sled 1400 is optimized, orotherwise configured, to provide other sleds 400 (e.g., compute sleds800, accelerator sleds 1000, etc.) with access to a pool of memory(e.g., in two or more sets 1430, 1432 of memory devices 720) local tothe memory sled 1200. For example, during operation, a compute sled 800or an accelerator sled 1000 may remotely write to and/or read from oneor more of the memory sets 1430, 1432 of the memory sled 1200 using alogical address space that maps to physical addresses in the memory sets1430, 1432. The memory sled 1400 includes various components similar tocomponents of the sled 400 and/or the compute sled 800, which have beenidentified in FIG. 14 using the same reference numbers. The descriptionof such components provided above in regard to FIGS. 6, 7, and 8 applyto the corresponding components of the memory sled 1400 and is notrepeated herein for clarity of the description of the memory sled 1400.

In the illustrative memory sled 1400, the physical resources 620 areembodied as memory controllers 1420. Although only two memorycontrollers 1420 are shown in FIG. 14, it should be appreciated that thememory sled 1400 may include additional memory controllers 1420 in otherembodiments. The memory controllers 1420 may be embodied as any type ofprocessor, controller, or control circuit capable of controlling thewriting and reading of data into the memory sets 1430, 1432 based onrequests received via the communication circuit 830. In the illustrativeembodiment, each storage controller 1220 is connected to a correspondingmemory set 1430, 1432 to write to and read from memory devices 720within the corresponding memory set 1430, 1432 and enforce anypermissions (e.g., read, write, etc.) associated with sled 400 that hassent a request to the memory sled 1400 to perform a memory accessoperation (e.g., read or write).

In some embodiments, the memory sled 1400 may also include acontroller-to-controller interconnect 1442. Similar to theresource-to-resource interconnect 624 of the sled 400 discussed above,the controller-to-controller interconnect 1442 may be embodied as anytype of communication interconnect capable of facilitatingcontroller-to-controller communications. In the illustrative embodiment,the controller-to-controller interconnect 1442 is embodied as ahigh-speed point-to-point interconnect (e.g., faster than the I/Osubsystem 622). For example, the controller-to-controller interconnect1442 may be embodied as a QuickPath Interconnect (QPI), an UltraPathInterconnect (UPI), or other high-speed point-to-point interconnectdedicated to processor-to-processor communications. As such, in someembodiments, a memory controller 1420 may access, through thecontroller-to-controller interconnect 1442, memory that is within thememory set 1432 associated with another memory controller 1420. In someembodiments, a scalable memory controller is made of multiple smallermemory controllers, referred to herein as “chiplets”, on a memory sled(e.g., the memory sled 1400). The chiplets may be interconnected (e.g.,using EMIB (Embedded Multi-Die Interconnect Bridge)). The combinedchiplet memory controller may scale up to a relatively large number ofmemory controllers and I/O ports, (e.g., up to 16 memory channels). Insome embodiments, the memory controllers 1420 may implement a memoryinterleave (e.g., one memory address is mapped to the memory set 1430,the next memory address is mapped to the memory set 1432, and the thirdaddress is mapped to the memory set 1430, etc.). The interleaving may bemanaged within the memory controllers 1420, or from CPU sockets (e.g.,of the compute sled 800) across network links to the memory sets 1430,1432, and may improve the latency associated with performing memoryaccess operations as compared to accessing contiguous memory addressesfrom the same memory device.

Further, in some embodiments, the memory sled 1400 may be connected toone or more other sleds 400 (e.g., in the same rack 240 or an adjacentrack 240) through a waveguide, using the waveguide connector 1480. Inthe illustrative embodiment, the waveguides are 64 millimeter waveguidesthat provide 16 Rx (i.e., receive) lanes and 16 Rt (i.e., transmit)lanes. Each lane, in the illustrative embodiment, is either 16 Ghz or 32Ghz. In other embodiments, the frequencies may be different. Using awaveguide may provide high throughput access to the memory pool (e.g.,the memory sets 1430, 1432) to another sled (e.g., a sled 400 in thesame rack 240 or an adjacent rack 240 as the memory sled 1400) withoutadding to the load on the optical data connector 834.

Referring now to FIG. 15, a system for executing one or more workloads(e.g., applications) may be implemented in accordance with the datacenter 100. In the illustrative embodiment, the system 1510 includes anorchestrator server 1520, which may be embodied as a managed nodecomprising a compute device (e.g., a compute sled 800) executingmanagement software (e.g., a cloud operating environment, such asOpenStack) that is communicatively coupled to multiple sleds 400including a large number of compute sleds 1530 (e.g., each similar tothe compute sled 800), memory sleds 1540 (e.g., each similar to thememory sled 1400), accelerator sleds 1550 (e.g., each similar to thememory sled 1000), and storage sleds 1560 (e.g., each similar to thestorage sled 1200). One or more of the sleds 1530, 1540, 1550, 1560 maybe grouped into a managed node 1570, such as by the orchestrator server1520, to collectively perform a workload (e.g., an application 1532executed in a virtual machine or in a container). The managed node 1570may be embodied as an assembly of physical resources 620, such asprocessors 820, memory resources 720, accelerator circuits 1020, or datastorage 1250, from the same or different sleds 400. Further, the managednode may be established, defined, or “spun up” by the orchestratorserver 1520 at the time a workload is to be assigned to the managed nodeor at any other time, and may exist regardless of whether any workloadsare presently assigned to the managed node. In the illustrativeembodiment, the orchestrator server 1520 may selectively allocate and/ordeallocate physical resources 620 from the sleds 400 and/or add orremove one or more sleds 400 from the managed node 1570 as a function ofquality of service (QoS) targets (e.g., performance targets associatedwith a throughput, latency, instructions per second, etc.) associatedwith a service level agreement for the workload (e.g., the application1532). In doing so, the orchestrator server 1520 may receive telemetrydata indicative of performance conditions (e.g., throughput, latency,instructions per second, etc.) in each sled 400 of the managed node 1570and compare the telemetry data to the quality of service targets todetermine whether the quality of service targets are being satisfied. Ifthe so, the orchestrator server 1520 may additionally determine whetherone or more physical resources may be deallocated from the managed node1570 while still satisfying the QoS targets, thereby freeing up thosephysical resources for use in another managed node (e.g., to execute adifferent workload). Alternatively, if the QoS targets are not presentlysatisfied, the orchestrator server 1520 may determine to dynamicallyallocate additional physical resources to assist in the execution of theworkload (e.g., the application 1532) while the workload is executing

Additionally, in some embodiments, the orchestrator server 1520 mayidentify trends in the resource utilization of the workload (e.g., theapplication 1532), such as by identifying phases of execution (e.g.,time periods in which different operations, each having differentresource utilizations characteristics, are performed) of the workload(e.g., the application 1532) and pre-emptively identifying availableresources in the data center 100 and allocating them to the managed node1570 (e.g., within a predefined time period of the associated phasebeginning). In some embodiments, the orchestrator server 1520 may modelperformance based on various latencies and a distribution scheme toplace workloads among compute sleds and other resources (e.g.,accelerator sleds, memory sleds, storage sleds) in the data center 100.For example, the orchestrator server 1520 may utilize a model thataccounts for the performance of resources on the sleds 400 (e.g., FPGAperformance, memory access latency, etc.) and the performance (e.g.,congestion, latency, bandwidth) of the path through the network to theresource (e.g., FPGA). As such, the orchestrator server 1520 maydetermine which resource(s) should be used with which workloads based onthe total latency associated with each potential resource available inthe data center 100 (e.g., the latency associated with the performanceof the resource itself in addition to the latency associated with thepath through the network between the compute sled executing the workloadand the sled 400 on which the resource is located).

In some embodiments, the orchestrator server 1520 may generate a map ofheat generation in the data center 100 using telemetry data (e.g.,temperatures, fan speeds, etc.) reported from the sleds 400 and allocateresources to managed nodes as a function of the map of heat generationand predicted heat generation associated with different workloads, tomaintain a target temperature and heat distribution in the data center100. Additionally or alternatively, in some embodiments, theorchestrator server 1520 may organize received telemetry data into ahierarchical model that is indicative of a relationship between themanaged nodes (e.g., a spatial relationship such as the physicallocations of the resources of the managed nodes within the data center100 and/or a functional relationship, such as groupings of the managednodes by the customers the managed nodes provide services for, the typesof functions typically performed by the managed nodes, managed nodesthat typically share or exchange workloads among each other, etc.).Based on differences in the physical locations and resources in themanaged nodes, a given workload may exhibit different resourceutilizations (e.g., cause a different internal temperature, use adifferent percentage of processor or memory capacity) across theresources of different managed nodes. The orchestrator server 1520 maydetermine the differences based on the telemetry data stored in thehierarchical model and factor the differences into a prediction offuture resource utilization of a workload if the workload is reassignedfrom one managed node to another managed node, to accurately balanceresource utilization in the data center 100.

To reduce the computational load on the orchestrator server 1520 and thedata transfer load on the network, in some embodiments, the orchestratorserver 1520 may send self-test information to the sleds 400 to enableeach sled 400 to locally (e.g., on the sled 400) determine whethertelemetry data generated by the sled 400 satisfies one or moreconditions (e.g., an available capacity that satisfies a predefinedthreshold, a temperature that satisfies a predefined threshold, etc.).Each sled 400 may then report back a simplified result (e.g., yes or no)to the orchestrator server 1520, which the orchestrator server 1520 mayutilize in determining the allocation of resources to managed nodes.

Referring now to FIG. 16, a system 1610 for allocating resources acrossdata centers may be implemented in accordance with the data center 100described above with reference to FIG. 1. In the illustrativeembodiment, the system 1610 includes an orchestrator server 1620communicatively coupled to multiple sleds including one or more computesleds 1630, one or more accelerator sleds 1640, one or more data storagesleds 1650, and one or more memory sleds 1660. The compute sled(s) 1630include compute resources 1632, in operation, execute an application1638 (e.g., a workload). The accelerator sled(s) 1640 includeaccelerator resources 1642. Additionally, the data storage sled(s) 1650include data storage resource 1652, and the memory sled(s) 1660 includememory resources 1662. One or more of the sleds 1630, 1640, 1650, 1660may be grouped into a managed node, such as by the orchestrator server1620, to collectively perform a workload (e.g., the application 1638). Amanaged node may be embodied as an assembly of resources, such ascompute resources, memory resources, storage resources, or otherresources, from the same or different sleds or racks. Further, a managednode may be established, defined, or “spun up” by the orchestratorserver 1620 at the time a workload is to be assigned to the managed nodeor at any other time, and may exist regardless of whether any workloadsare presently assigned to the managed node. The system 1610 may belocated in a data center and provide storage and compute services (e.g.,cloud services) to a client device (not shown) that is in communicationwith the system 1610 through a network 1612. The orchestrator server1620 may support a cloud operating environment, such as OpenStack, andmanaged nodes established by the orchestrator server 1620 may executeone or more applications or processes (i.e., workloads), such as invirtual machines or containers, on behalf of a user of a client device(not shown).

In the illustrative embodiment, the orchestrator server 1620 determineswhether an amount of resources to be used in the execution of anworkload (e.g., the application 1638) by a managed node exceeds theamount of resources available in the data center 1614 in which theorchestrator server 1620 and the sleds of the managed node are locatedand, if so, communicates with one or more other data centers 1670, 1680(e.g., through the network 1612) that are located off-premises toallocate resources 1672, 1682 to the managed node. The resources 1672 inthe data center 1670 include compute resources 1634, similar to thecompute resources 1632, accelerator resources 1644, similar to theaccelerator resources 1642, data storage resources 1654, similar to thedata storage resources 1652, and memory resources 1664, similar to thememory resources 1662. Further, the resources 1682 include computeresources 1636, similar to the compute resources 1632, acceleratorresources 1646, similar to the accelerator resources 1642, data storageresources 1656, similar to the data storage resources 1652, and memoryresources 1666, similar to the memory resources 1662. In allocating theresources, the orchestrator server 1620 may determine the availabilityand cost of using the resources at each data center 1670, 1680 andselect the resources for use by the managed node as a function of theavailability and cost. Further, the orchestrator server 1620 may, incommunicating with the data centers 1670, 1680, utilize an applicationprogramming interface (API) to format requests and queries pursuant to aformat specific to each data center 1670, 1680. Additionally, in theillustrative embodiment, the orchestrator server 1620 obtains addressinformation from the data centers 1670, 1680 that is usable by themanaged node to access the resources as if they were local (e.g., in thedata center 1614) such as through non-volatile memory express overfabric (NVMe-oF) or other local data bus protocols that are mapped ontoa fabric (e.g., a network topology). The orchestrator server 1620 maysubsequently deallocate the resources when the resource utilizationneeds of the managed node decrease (e.g., when the workload enters intoa less resource-intensive phase). As such, unlike typical systems inwhich a managed node is limited to the resources available in aparticular data center, the system 1610 enables flexible bursting of theinfrastructure (e.g., resources) beyond the particular data center 1614(e.g., to other data centers) to accommodate the changing resource needsof a workload when the resources are unavailable in the data center1614.

Referring now to FIG. 17, the orchestrator server 1620 may be embodiedas any type of compute device capable of performing the functionsdescribed herein, including obtaining resource utilization dataindicative of a utilization of resources for a managed node to execute aworkload, determining whether a set of resources presently available tothe managed node in a data center in which the orchestrator server 1620is located satisfies the resource utilization data, and allocating, inresponse to a determination that the set of resources presentlyavailable to the managed node does not satisfy the resource utilizationdata, a supplemental set of resources to the managed node from anoff-premises data center. As shown in FIG. 17, the illustrativeorchestrator server 1620 includes a compute engine 1702, an input/output(I/O) subsystem 1708, communication circuitry 1710, and one or more datastorage devices 1714. Of course, in other embodiments, the orchestratorserver 1620 may include other or additional components, such as thosecommonly found in a computer (e.g., display, peripheral devices, etc.).Additionally, in some embodiments, one or more of the illustrativecomponents may be incorporated in, or otherwise form a portion of,another component.

The compute engine 1702 may be embodied as any type of device orcollection of devices capable of performing various compute functionsdescribed below. In some embodiments, the compute engine 1702 may beembodied as a single device such as an integrated circuit, an embeddedsystem, a field-programmable gate array (FPGA), a system-on-a-chip(SOC), or other integrated system or device. In the illustrativeembodiment, the compute engine 1702 includes or is embodied as aprocessor 1704 and a memory 1706. The processor 1704 may be embodied asany type of processor capable of performing the functions describedherein. For example, the processor 1704 may be embodied as a single ormulti-core processor(s), a microcontroller, or other processor orprocessing/controlling circuit. In some embodiments, the processor 1704may be embodied as, include, or be coupled to an FPGA, an applicationspecific integrated circuit (ASIC), reconfigurable hardware or hardwarecircuitry, or other specialized hardware to facilitate performance ofthe functions described herein.

The memory 1706 may be embodied as any type of volatile (e.g., dynamicrandom access memory (DRAM), etc.) or non-volatile memory or datastorage capable of performing the functions described herein. Volatilememory may be a storage medium that requires power to maintain the stateof data stored by the medium. Non-limiting examples of volatile memorymay include various types of random access memory (RAM), such as dynamicrandom access memory (DRAM) or static random access memory (SRAM). Oneparticular type of DRAM that may be used in a memory module issynchronous dynamic random access memory (SDRAM). In particularembodiments, DRAM of a memory component may comply with a standardpromulgated by JEDEC, such as JESD79F for DDR SDRAM, JESD79-2F for DDR2SDRAM, JESD79-3F for DDR3 SDRAM, JESD79-4A for DDR4 SDRAM, JESD209 forLow Power DDR (LPDDR), JESD209-2 for LPDDR2, JESD209-3 for LPDDR3, andJESD209-4 for LPDDR4 (these standards are available at www.jedec.org).Such standards (and similar standards) may be referred to as DDR-basedstandards and communication interfaces of the storage devices thatimplement such standards may be referred to as DDR-based interfaces.

In one embodiment, the memory device is a block addressable memorydevice, such as those based on NAND or NOR technologies. A memory devicemay also include future generation nonvolatile devices, such as a threedimensional crosspoint memory device (e.g., Intel 3D XPoint™ memory), orother byte addressable write-in-place nonvolatile memory devices. In oneembodiment, the memory device may be or may include memory devices thatuse chalcogenide glass, multi-threshold level NAND flash memory, NORflash memory, single or multi-level Phase Change Memory (PCM), aresistive memory, nanowire memory, ferroelectric transistor randomaccess memory (FeTRAM), anti-ferroelectric memory, magnetoresistiverandom access memory (MRAM) memory that incorporates memristortechnology, resistive memory including the metal oxide base, the oxygenvacancy base and the conductive bridge Random Access Memory (CB-RAM), orspin transfer torque (STT)-MRAM, a spintronic magnetic junction memorybased device, a magnetic tunneling junction (MTJ) based device, a DW(Domain Wall) and SOT (Spin Orbit Transfer) based device, a thyristorbased memory device, or a combination of any of the above, or othermemory. The memory device may refer to the die itself and/or to apackaged memory product.

In some embodiments, 3D crosspoint memory (e.g., Intel 3D XPoint™memory) may comprise a transistor-less stackable cross pointarchitecture in which memory cells sit at the intersection of word linesand bit lines and are individually addressable and in which bit storageis based on a change in bulk resistance. In some embodiments, all or aportion of the memory 1706 may be integrated into the processor 1704. Inoperation, the memory 1706 may store various software and data usedduring operation such as resource utilization data, resourceavailability data, application programming interface (API) data,applications, programs, and libraries.

The compute engine 1702 is communicatively coupled to other componentsof the sled 1630 via the I/O subsystem 1708, which may be embodied ascircuitry and/or components to facilitate input/output operations withthe compute engine 1702 (e.g., with the processor 1704 and/or the memory1706) and other components of the orchestrator server 1620. For example,the I/O subsystem 1708 may be embodied as, or otherwise include, memorycontroller hubs, input/output control hubs, integrated sensor hubs,firmware devices, communication links (e.g., point-to-point links, buslinks, wires, cables, light guides, printed circuit board traces, etc.),and/or other components and subsystems to facilitate the input/outputoperations. In some embodiments, the I/O subsystem 1708 may form aportion of a system-on-a-chip (SoC) and be incorporated, along with oneor more of the processor 1704, the memory 1706, and other components ofthe orchestrator server 1620, into the compute engine 1702.

The communication circuitry 1710 may be embodied as any communicationcircuit, device, or collection thereof, capable of enablingcommunications over the network 1612 between the orchestrator server1620 and another compute device (e.g., the sleds 1630, 1640, 1650, 1660,and/or compute devices of the other data centers 1670, 1680, etc.). Thecommunication circuitry 1710 may be configured to use any one or morecommunication technology (e.g., wired or wireless communications) andassociated protocols (e.g., Ethernet, Bluetooth®, Wi-Fi®, WiMAX, etc.)to effect such communication.

The communication circuitry 1710 may include a network interfacecontroller (NIC) 1712 (e.g., as an add-in device), which may also bereferred to as a host fabric interface (HFI). The NIC 1712 may beembodied as one or more add-in-boards, daughter cards, network interfacecards, controller chips, chipsets, or other devices that may be used bythe orchestrator server 1620 to connect with another compute device(e.g., the sleds 1630, 1640, 1650, 1660, and/or compute devices of theother data centers 1670, 1680, etc.). In some embodiments, the NIC 1712may be embodied as part of a system-on-a-chip (SoC) that includes one ormore processors, or included on a multichip package that also containsone or more processors. In some embodiments, the NIC 1712 may include alocal processor (not shown) and/or a local memory (not shown) that areboth local to the NIC 1712. In such embodiments, the local processor ofthe NIC 1712 may be capable of performing one or more of the functionsof the compute engine 1702 described herein. Additionally oralternatively, in such embodiments, the local memory of the NIC 1712 maybe integrated into one or more components of the orchestrator server1620 at the board level, socket level, chip level, and/or other levels.

The one or more illustrative data storage devices 1714 may be embodiedas any type of devices configured for short-term or long-term storage ofdata such as, for example, memory devices and circuits, memory cards,hard disk drives, solid-state drives, or other data storage devices.Each data storage device 1714 may include a system partition that storesdata and firmware code for the data storage device 1714. Each datastorage device 1714 may also include one or more operating systempartitions that store data files and executables for operating systems.

The sleds 1630, 1640, 1650, 1660 may have components similar to thosedescribed in FIG. 17. The description of those components of theorchestrator server 1620 is equally applicable to the description ofcomponents of those devices and is not repeated herein for clarity ofthe description. Further, it should be appreciated that any of theorchestrator server 1620, and the sleds 1630, 1640, 1650, 1660 mayinclude other components, sub-components, and devices commonly found ina computing device, which are not discussed above in reference to theorchestrator server 1620 and not discussed herein for clarity of thedescription.

As described above, the orchestrator server 1620, the sleds 1630, 1640,1650, 1660 and the data centers 1670, 1680 are illustratively incommunication via the network 1612, which may be embodied as any type ofwired or wireless communication network, including global networks(e.g., the Internet), local area networks (LANs) or wide area networks(WANs), cellular networks (e.g., Global System for Mobile Communications(GSM), 3G, Long Term Evolution (LTE), Worldwide Interoperability forMicrowave Access (WiMAX), etc.), digital subscriber line (DSL) networks,cable networks (e.g., coaxial networks, fiber networks, etc.), or anycombination thereof.

Referring now to FIG. 18, the orchestrator server 1620 may establish anenvironment 1800 during operation. The illustrative environment 1800includes a network communicator 1820 and a burst manager 1830. Each ofthe components of the environment 1800 may be embodied as hardware,firmware, software, or a combination thereof. As such, in someembodiments, one or more of the components of the environment 1800 maybe embodied as circuitry or a collection of electrical devices (e.g.,network communicator circuitry 1820, burst manager circuitry 1830,etc.). It should be appreciated that, in such embodiments, one or moreof the network communicator circuitry 1820 or burst manager circuitry1830 may form a portion of one or more of the compute engine 1702, theI/O subsystem 1708, the communication circuitry 1710 and/or othercomponents of the orchestrator server 1620. In the illustrativeembodiment, the environment 1800 includes resource utilization data 1802which may be embodied as any data indicative of present and/or predictedamounts and types (e.g., compute, accelerator, data storage, memory) ofresources to be utilized by a managed node to execute a workload (e.g.,the application 1638). As such, the resource utilization data 1802 mayinclude telemetry data indicative of performance conditions in each sled1630, 1640, 1650, 1660 in the managed node associated with the workload,such as the present load on each resource of each sled (e.g., thepercentage of the resource presently utilized by the workload),fingerprint data indicative of resource utilization profiles ofdifferent phases of operation of a workload (e.g., phase A characterizedby relatively high compute usage and relative low memory usage, followedby phase B characterized by relatively high accelerator usage,relatively high memory usage, and relatively low data storage usage,etc.) and the lengths of time (e.g., residencies) that each phasetypically lasts. Additionally, the resource utilization data 1802 mayinclude target thresholds to which the measured resource utilizations(e.g., loads) are to be compared to and/or target throughput and/orlatency (e.g., quality of service (QoS) metrics), pursuant to a servicelevel agreement (SLA) with a customer for whom the workload is executed.The environment 1800, in the illustrative embodiment, also includesresource availability data 1804 which may be embodied as any dataindicative of the availability of resources 1672, 1682 at theoff-premises data centers 1670, 1680 and the costs of using them (e.g.,dollars per unit of compute capacity per second, dollars for gigabyte ofstorage per second, costs of utilizing a network to access the resources1672, 1682, etc.). The resource availability data 1804, in theillustrative embodiment, also includes data indicative of the amount andtypes of presently unallocated resources in the data center 1614 (e.g.,on-premises). Additionally, the illustrative environment 1800 includesapplication programming interface (API) data 1806, which may be embodiedas any data indicative of instructions usable to format requests andqueries and otherwise communicate with each data center 1670, 1680. Insome embodiments, each data center 1670, 1680 may communicate using adifferent protocol, and as such, the API data 1806 may include librariesor other instructions unique to each data center 1670, 1680.

In the illustrative environment 1800, the network communicator 1820,which may be embodied as hardware, firmware, software, virtualizedhardware, emulated architecture, and/or a combination thereof asdiscussed above, is configured to facilitate inbound and outboundnetwork communications (e.g., network traffic, network packets, networkflows, etc.) to and from the orchestrator server 1620, respectively. Todo so, the network communicator 1820 is configured to receive andprocess data packets from one system or computing device (e.g., one ormore of the sleds 1630, 1640, 1650, 1660) and to prepare and send datapackets to another computing device or system (e.g., resources of one ormore of the data centers 1670, 1680). Accordingly, in some embodiments,at least a portion of the functionality of the network communicator 1820may be performed by the communication circuitry 1710, and, in theillustrative embodiment, by the NIC 1712.

The burst manager 1830, which may be embodied as hardware, firmware,software, virtualized hardware, emulated architecture, and/or acombination thereof, is configured to obtain the resource utilizationdata 1802, determine whether a set of resources presently available tothe managed node in the data center 1614 satisfies the resourceutilization data 1802, and allocate, in response to a determination thatthe set of resources presently available to the managed node does notsatisfy the resource utilization data, a supplemental set of resources1672, 1682 to the managed node from an off-premises data center 1670,1680. To do so, in the illustrative embodiment, the burst manager 1830includes a resource utilization determiner 1832 and an allocationmanager 1834.

The resource utilization determiner 1832, in the illustrativeembodiment, is configured to obtain the resource utilization data 1802,such as by collecting telemetry data indicative of the performanceconditions of the resources allocated to the managed node executing theworkload, determining patterns in the resource utilizations of theworkload over time (e.g., fingerprint data), and predicting the upcomingresource utilization of the workload (e.g., within a predefined amountof time) based on the patterns.

The allocation manager 1834, in the illustrative embodiment, isconfigured to selectively allocate and/or deallocate resources from themanaged node as the workload is executed, from the data center 1614and/or from off-premises data centers 1670, 1680, to satisfy theresource needs of the managed node, as determined by the resourceutilization determiner 1832. To do so, in the illustrative embodiment,the allocation manager 1834 includes an on-premises allocator 1836 andan off-premises allocator 1838. The on-premises allocator 1836, in theillustrative embodiment, is configured to allocate resources (e.g.,compute resources 1632, accelerator resources 1642, data storageresources 1652, memory resources 1662) that are presently available inthe data center 1614 to the managed node, such as by sendingnotifications of their assignment to the corresponding sleds 1630, 1640,1650, 1660 on which the resources are located and/or by providinginformation usable by the compute sled 1630 to access the resources(e.g., address information). The off-premises allocator 1838, in theillustrative embodiment, is configured to communicate with one or moreoff-premises data centers (e.g., the data centers 1670, 1680) todetermine the amounts and types of resources available and selectivelyallocate or deallocate the resources on an as-needed basis (e.g., whenthe resources are not available in the data center 1614). In doing so,the off-premises allocator may compare the cost of each resource (e.g.,a price charged by the operator of the off-premises data center 1670,1680) and select the lowest-cost resources for allocation. Additionally,the off-premises allocator 1838 may utilize one or more APIs in the APIdata 1806 to communicate with the off-premises data centers 1670, 1680.

It should be appreciated that each of the resource utilizationdeterminer 1832, the allocation manager 1834, the on-premises allocator1836, and the off-premises allocator 1838 may be separately embodied ashardware, firmware, software, virtualized hardware, emulatedarchitecture, and/or a combination thereof. For example, the resourceutilization determiner 1832 may be embodied as a hardware component,while the allocation manager 1834, the on-premises allocator 1836, andthe off-premises allocator 1838 are embodied as virtualized hardwarecomponents or as some other combination of hardware, firmware, software,virtualized hardware, emulated architecture, and/or a combinationthereof.

Referring now to FIG. 19, the orchestrator server 1620, in operation,may execute a method 1900 for allocating resources across data centers.The method 1900 begins with block 1902 in which the orchestrator server1620 obtains resource utilization data indicative of resourceutilization of a managed node associated with a workload (e.g., autilization of resources needed to execute the application 1638 at apredefined quality of service). In doing so, the orchestrator server1620 may receive a managed node composition request associated with aworkload (e.g., from a compute sled 1630 that is to execute theapplication 1638 or from a client device (not shown)), as indicated inblock 1904. As indicated in block 1906, the orchestrator server 1620, inreceiving the managed node composition request, may receive a servicelevel agreement indicative of one or more quality of service metricsassociated with the workload (e.g., a target latency, a targetthroughput, a target number of input/output operations per second, atarget number of instructions executed per second, etc.). Additionallyor alternatively, the orchestrator server 1620 may receive telemetrydata from a presently-executing managed node (e.g., a managed nodepresently executing the workload, such as the application 1638), asindicated in block 1908. In the illustrative embodiment, theorchestrator server 1620 determines a predicted resource utilization ofthe managed node (e.g., the resource utilization predicted in apredefined period of time in the future, such as one second) fromworkload fingerprint data (e.g., resource utilization phases, patternsof the phases exhibited over time, and the residencies of the phases),as indicated in block 1910.

Subsequently, in block 1912, the orchestrator server 1620 determineswhether resources allocated to the managed node satisfy the obtainedresource utilization data. In doing so, and as indicated in block 1914,the orchestrator server 1620 may determine whether the present resourcesare within a predefined range (e.g., 1%) of the obtained utilizationdata (e.g., within 1% of the amount of resources that are needed by themanaged node or are predicted to be needed by the managed node). Thepredefined range may be defined in the service level agreement as anacceptable variance in the quality of service or may be defined byanother source (e.g., in a configuration file). In the illustrativeembodiment, the orchestrator server 1620 compares the availableresources in the present data center 1614 to the obtained resourceutilization data, as indicated in block 1916. In doing so, theorchestrator server 1620 may allocate resources available in the presentdata center to the managed node (e.g., if the resource utilization dataindicates a shortfall between the amount of resources allocated and theamount needed, and those resources are not presently allocated to anyother managed nodes in the data center 1614), as indicated in block1918. The orchestrator server 1620 may also compare the amounts andtypes of any off-premises resources (e.g., resources 1672, 1682 locatedin the data centers 1670, 1680) presently allocated to the managed nodeto the resource utilization data, as indicated in block 1920.Subsequently, in block 1922, the orchestrator server 1620 determines acourse of action to take as a function of whether the present resources(e.g., from the data center 1614 and any off-premises data centers 1670,1680) allocated to the managed node satisfy (e.g., are within thepredefined range of) the resource utilization data. If so, the method1900 advances to block 1924, in which the orchestrator server 1620monitors further execution of the workload (e.g., the application 1638)and obtains additional (e.g., subsequent) resource utilization data inblock 1902, described above. Otherwise, the method 1900 advances toblock 1926 of FIG. 20, in which the orchestrator server 1620 determineswhether the presently allocated resources exceed the resourceutilization data (e.g., in excess of the predefined range of resources).

Referring now to FIG. 20, in response to a determination that thepresent resources allocated to the managed node exceed the resourceutilization data, the method 1900 advances to block 1928 in which theorchestrator server 1620 deallocates resources from the managed node. Indoing so and as indicated in block 1930, the orchestrator server 1620determines the amount of resources to deallocate. The orchestratorserver 1620, in the illustrative embodiment, does so by determining thedifference between the presently allocated resources and the resourceutilization data, as indicated in block 1932. As indicated in block1934, in deallocating the resources, the orchestrator server 1620 maydeallocate off-premises resources before deallocating resources in thepresent data center 1614 (e.g., the data center in which theorchestrator server 1620 is located). In other words, the orchestratorserver 1620 prioritizes deallocating off-premises resources overdeallocating resources present in the data center 1614. As indicated inblock 1936, the orchestrator server 1620 may deallocate more expensiveresources before deallocating less expensive resources (e.g., as afunction of fees charged by operators of the data centers 1670, 1680 foruse of the off-premises resources). In deallocating the off-premisesresources, the orchestrator server 1620, in the illustrative embodiment,sends, through the network 1612, one or more deallocation requests toeach off-premises data center 1670, 1680 from which resources are to bedeallocated, as indicated in block 1938. As each data center 1670, 1680may communicate using a different protocol, the orchestrator server 1620may send the deallocation request(s) using an API associated with eachoff-premises data center 1670, 1680 (e.g., the API data 1806), asindicated in block 1940. Subsequently, the method 1900 loops back toblock 1924 of FIG. 19, in which execution of the workload continues.

Referring back to block 1926 of FIG. 20, if the orchestrator server 1620instead determines that the present resources do not exceed the resourceutilization data 1802 (e.g., the present resources are less than theresource utilization data 1802), the method 1900 advances to block 1942in which the orchestrator server 1620 determines the availability ofsupplemental resources from one or more off-premises data centers (e.g.,the resources 1672, 1682 at data centers 1670, 1680). In doing so, theorchestrator server 1620 may query each off-premises data center 1670,1680 for the availability of resources at those data centers 1670, 1680,as indicated in block 1944. In the illustrative embodiment, theorchestrator server 1620 may query for the availability of specifictypes of resources to satisfy the resource utilization data 1802 (e.g.,if the resource utilization data 1802 indicates a deficiency inavailable accelerator resources, the query may request informationindicative of the availability of accelerator resources at thecorresponding data center 1670, 1680), as indicated in block 1946. Asindicated in block 1948, the orchestrator server 1620 may additionallyquery for the financial cost of each resource available at theoff-premises data center 1670, 1680 (e.g., a financial cost per unit oftime on a specific FPGA, a financial cost per number of gigabytesallocated from a particular type of data storage device, etc.). Further,as indicated in block 1950, the orchestrator server 1620 may send thequeries using an API associated with each off-premises data center 1670,1680. Subsequently, the method 1900 advances to block 1952 of FIG. 21,in which the orchestrator server 1620 selects one or more of theoff-premises data centers 1670, 1680 from which to allocate thesupplemental resources.

Referring now to FIG. 21, in selecting one or more off-premises datacenters 1670, 1680, the orchestrator server 1620 may determine a costper unit of each resource 1672, 1682, as indicated in block 1954. Forexample, the orchestrator server 1620 may determine that one class ofaccelerator resource available at the data center 1670 performs agreater number of operations per second than another class ofaccelerator resource available at the data center 1680. Similarly, oneclass of memory or data storage device available at the data center 1670may provide a greater read and/or write throughput than another class ofmemory or data storage device available at the data center 1680. Assuch, and as indicated in block 1956, the orchestrator server 1620, inthe illustrative embodiment, adjusts the costs (e.g., from block 1948 ofFIG. 20) as a function of performance differences between classes ofresources provided by each off-premises data center 1670, 1680. Forexample, the orchestrator server 1620 may determine a unit by which tomeasure each class of resource (e.g., operations per second), determinethe amount of the units provided by each class of resources, and dividethe cost associated with the resource by the amount of the unitsprovided the resource (e.g., cents per operation per second).Additionally, the orchestrator server 1620 may adjust the cost as afunction of characteristics of each off-premises data center 1670, 1680,as indicated in block 1958. In doing so, the orchestrator server 1620may adjust the cost as a function of the reliability of each data center1670, 1680 (e.g., decreasing the cost for a more reliable data centerand increasing the cost for a less reliable data center), as indicatedin block 1960. As indicated in block 1962, the orchestrator server 1620may adjust the cost as a function of the responsiveness of each datacenter 1670, 1680 (e.g., decreasing the cost for a data center thatgenerally has a lower latency and increasing the cost for a data centerthat generally has a higher latency). In block 1964, the orchestratorserver 1620 may prioritize (e.g., rank for selection) the data centers1670, 1680 in order from lowest cost to highest cost. The orchestratorserver 1620 may also compare the lowest available cost of allocatingoff-premises resources 1672, 1682 (e.g., in accordance with theprioritization from block 1964) to a cost of not satisfying quality ofservice metrics associated with the workload (e.g., as specified in aservice level agreement for the workload) and determine whether the costof allocating the off-premises resources is less than or equal to thecost of not satisfying the QoS metric(s), as indicated in block 1966. Inthe illustrative embodiment, if the cost of allocating the off-premisesresources is less than or equal to the cost of not satisfying the QoSmetric(s), the orchestrator server 1620 selects one or more of theoff-premises data centers 1670, 1680 for allocation of off-premises(e.g., supplemental) resources.

In block 1968, the orchestrator server 1620 determines the subsequentcourse of action as a function of whether one or more off-premises datacenters 1670, 1680 have been selected. If not, the method 1900 loopsback to block 1924 of FIG. 19, in which the managed node continuesexecution of the workload. Otherwise, the method 1900 advances to block1970, in which the orchestrator server 1620 allocates the supplementaloff-premises resource(s) to the managed node associated with theworkload (e.g., the application 1638). In doing so, the orchestratorserver 1620 may send a request to each selected off-premises data centerto allocate the corresponding resource(s), as indicated in block 1972.The orchestrator server 1620 may send each request using an APIassociated with the corresponding data center 1670, 1680, as indicatedin block 1974. Further, and as indicated in block 1976, the orchestratorserver 1620 receives data usable to utilize the allocated resource(s).In doing so, the orchestrator server 1620 may receive address data(e.g., a unique identifier such as an Internet Protocol (IP) address, amedia access control (MAC) address, etc.) for each resource, asindicated in block 1978. Further, in the illustrative embodiment, theorchestrator server 1620 maps each off-premises resource as a localresource (e.g., to appear to sleds of the managed node in the datacenter 1614 as if those off-premises resources 1672, 1682 are alsolocated in the data center 1614), as indicated in block 1980. Forexample, and as indicated in block 1982, the orchestrator server 1620may map one or more resource(s) for access via non-volatile memoryexpress over fabric (NVMe-oF). Subsequently, the method 1900 loops backto block 1924 of FIG. 19 in which execution of the workload continues.

Examples

Illustrative examples of the technologies disclosed herein are providedbelow. An embodiment of the technologies may include any one or more,and any combination of, the examples described below.

Example 1 includes a compute device comprising a compute engine to (i)obtain resource utilization data indicative of a utilization ofresources for a managed node to execute a workload, (ii) determinewhether a set of resources presently available to the managed node in adata center in which the compute device is located satisfies theresource utilization data, and (iii) allocate, in response to adetermination that the set of resources presently available to themanaged node does not satisfy the resource utilization data, asupplemental set of resources to the managed node, wherein thesupplemental set of resources are located in an off-premises data centerthat is different from the data center in which the compute device islocated.

Example 2 includes the subject matter of Example 1, and wherein toallocate the supplemental set of resources comprises to map thesupplemental set of resources to be accessible as being located in thedata center in which the compute device is located.

Example 3 includes the subject matter of any of Examples 1 and 2, andwherein the compute engine is further to determine an availability ofthe supplemental set of resources prior to the allocation of thesupplemental set of resources.

Example 4 includes the subject matter of any of Examples 1-3, andwherein to determine the availability of the supplemental set ofresources comprises to query the off-premises data center for anavailability of the supplemental set of resources.

Example 5 includes the subject matter of any of Examples 1-4, andwherein to query the off-premises data center comprises to query theoff-premises data center with an application programming interfaceassociated with the off-premises data center.

Example 6 includes the subject matter of any of Examples 1-5, andwherein to determine the availability of the supplemental set ofresources comprises to query the off-premises data center for a cost ofthe supplemental set of resources.

Example 7 includes the subject matter of any of Examples 1-6, andwherein the off-premises data center is one of a plurality ofoff-premises data centers, and the compute engine is further to selectthe off-premises data center for allocation of the supplemental set ofresources as a function of the determined availability and cost of thesupplemental set of resources.

Example 8 includes the subject matter of any of Examples 1-7, andwherein the compute engine is further to deallocate, in response to adetermination that the set of resources presently allocated to themanaged node exceeds the resource utilization data, one or more of theresources from the managed node.

Example 9 includes the subject matter of any of Examples 1-8, andwherein to deallocate the one or more of the resources comprises toprioritize deallocation of resources located in the off-premises datacenter over deallocation of resources located in the data center inwhich the compute device is located.

Example 10 includes the subject matter of any of Examples 1-9, andwherein to deallocate the one or more of the resources comprises toprioritize deallocations of resources as a function of a cost of eachresource.

Example 11 includes the subject matter of any of Examples 1-10, andwherein the compute engine is further to determine whether a cost of notsatisfying a service level agreement associated with the workloadexceeds a cost of allocating the supplemental set of resources; and toallocate the supplemental set of resources comprises to allocate, inresponse to a determination that that the cost of not satisfying theservice level agreement exceeds the cost of allocating the supplementalset of resources, the supplemental set of resources.

Example 12 includes the subject matter of any of Examples 1-11, andwherein to allocate the supplemental set of resources comprises toallocate at least one of accelerator resources, data storage resources,compute resources, or memory resources.

Example 13 includes a method comprising obtaining, by a compute device,resource utilization data indicative of a utilization of resources for amanaged node to execute a workload; determining, by the compute device,whether a set of resources presently available to the managed node in adata center in which the compute device is located satisfies theresource utilization data; allocating, by the compute device and inresponse to a determination that the set of resources presentlyavailable to the managed node does not satisfy the resource utilizationdata, a supplemental set of resources to the managed node, wherein thesupplemental set of resources are located in an off-premises data centerthat is different from the data center in which the compute device islocated.

Example 14 includes the subject matter of Example 13, and whereinallocating the supplemental set of resources comprises mapping thesupplemental set of resources to be accessible as being located in thedata center in which the compute device is located.

Example 15 includes the subject matter of any of Examples 13 and 14, andfurther including determining, by the compute device, an availability ofthe supplemental set of resources prior to the allocation of thesupplemental set of resources.

Example 16 includes the subject matter of any of Examples 13-15, andwherein determining the availability of the supplemental set ofresources comprises querying the off-premises data center for anavailability of the supplemental set of resources.

Example 17 includes the subject matter of any of Examples 13-16, andwherein querying the off-premises data center comprises querying theoff-premises data center with an application programming interfaceassociated with the off-premises data center.

Example 18 includes the subject matter of any of Examples 13-17, andwherein determining the availability of the supplemental set ofresources comprises querying the off-premises data center for a cost ofthe supplemental set of resources.

Example 19 includes the subject matter of any of Examples 13-18, andwherein the off-premises data center is one of a plurality ofoff-premises data centers, the method further comprising selecting, bythe compute device, the off-premises data center for allocation of thesupplemental set of resources as a function of the determinedavailability and cost of the supplemental set of resources.

Example 20 includes the subject matter of any of Examples 13-19, andfurther including deallocating, by the compute device and in response toa determination that the set of resources presently allocated to themanaged node exceeds the resource utilization data, one or more of theresources from the managed node.

Example 21 includes the subject matter of any of Examples 13-20, andwherein deallocating the one or more of the resources comprisesprioritizing deallocation of resources located in the off-premises datacenter over deallocation of resources located in the data center inwhich the compute device is located.

Example 22 includes the subject matter of any of Examples 13-21, andwherein deallocating the one or more of the resources comprisesprioritizing deallocations of resources as a function of a cost of eachresource.

Example 23 includes the subject matter of any of Examples 13-22, andfurther including determining, by the compute device, whether a cost ofnot satisfying a service level agreement associated with the workloadexceeds a cost of allocating the supplemental set of resources; andallocating the supplemental set of resources comprises allocating, inresponse to a determination that that the cost of not satisfying theservice level agreement exceeds the cost of allocating the supplementalset of resources, the supplemental set of resources.

Example 24 includes the subject matter of any of Examples 13-23, andwherein allocating the supplemental set of resources comprisesallocating at least one of accelerator resources, data storageresources, compute resources, or memory resources.

Example 25 includes a compute device comprising means for performing themethod of any of Examples 13-24.

Example 26 includes one or more machine-readable storage mediacomprising a plurality of instructions stored thereon that, in responseto being executed, cause a compute engine to perform the method of anyof Examples 13-24.

Example 27 includes a compute device comprising a compute engine toperform the method of any of Examples 13-24.

Example 28 includes a compute device comprising burst manager circuitryto (i) obtain resource utilization data indicative of a utilization ofresources for a managed node to execute a workload, (ii) determinewhether a set of resources presently available to the managed node in adata center in which the compute device is located satisfies theresource utilization data, and (iii) allocate, in response to adetermination that the set of resources presently available to themanaged node does not satisfy the resource utilization data, asupplemental set of resources to the managed node, wherein thesupplemental set of resources are located in an off-premises data centerthat is different from the data center in which the compute device islocated.

Example 29 includes the subject matter of Example 28, and wherein toallocate the supplemental set of resources comprises to map thesupplemental set of resources to be accessible as being located in thedata center in which the compute device is located.

Example 30 includes the subject matter of any of Examples 28 and 29, andwherein the burst manager circuitry is further to determine anavailability of the supplemental set of resources prior to theallocation of the supplemental set of resources.

Example 31 includes the subject matter of any of Examples 28-30, andwherein to determine the availability of the supplemental set ofresources comprises to query the off-premises data center for anavailability of the supplemental set of resources.

Example 32 includes the subject matter of any of Examples 28-31, andwherein to query the off-premises data center comprises to query theoff-premises data center with an application programming interfaceassociated with the off-premises data center.

Example 33 includes the subject matter of any of Examples 28-32, andwherein to determine the availability of the supplemental set ofresources comprises to query the off-premises data center for a cost ofthe supplemental set of resources.

Example 34 includes the subject matter of any of Examples 28-33, andwherein the off-premises data center is one of a plurality ofoff-premises data centers, and the burst manager circuitry is further toselect the off-premises data center for allocation of the supplementalset of resources as a function of the determined availability and costof the supplemental set of resources.

Example 35 includes the subject matter of any of Examples 28-34, andwherein the burst manager circuitry is further to deallocate, inresponse to a determination that the set of resources presentlyallocated to the managed node exceeds the resource utilization data, oneor more of the resources from the managed node.

Example 36 includes the subject matter of any of Examples 28-35, andwherein to deallocate the one or more of the resources comprises toprioritize deallocation of resources located in the off-premises datacenter over deallocation of resources located in the data center inwhich the compute device is located.

Example 37 includes the subject matter of any of Examples 28-36, andwherein to deallocate the one or more of the resources comprises toprioritize deallocations of resources as a function of a cost of eachresource.

Example 38 includes the subject matter of any of Examples 28-37, andwherein the burst manager circuitry is further to determine whether acost of not satisfying a service level agreement associated with theworkload exceeds a cost of allocating the supplemental set of resources;and to allocate the supplemental set of resources comprises to allocate,in response to a determination that that the cost of not satisfying theservice level agreement exceeds the cost of allocating the supplementalset of resources, the supplemental set of resources.

Example 39 includes the subject matter of any of Examples 28-38, andwherein to allocate the supplemental set of resources comprises toallocate at least one of accelerator resources, data storage resources,compute resources, or memory resources.

Example 40 includes a compute device comprising circuitry for obtainingresource utilization data indicative of a utilization of resources for amanaged node to execute a workload; circuitry for determining whether aset of resources presently available to the managed node in a datacenter in which the compute device is located satisfies the resourceutilization data; means for allocating, in response to a determinationthat the set of resources presently available to the managed node doesnot satisfy the resource utilization data, a supplemental set ofresources to the managed node, wherein the supplemental set of resourcesare located in an off-premises data center that is different from thedata center in which the compute device is located.

Example 41 includes the subject matter of Example 40, and wherein themeans for allocating the supplemental set of resources comprises meansfor mapping the supplemental set of resources to be accessible as beinglocated in the data center in which the compute device is located.

Example 42 includes the subject matter of any of Examples 40 and 41, andfurther including circuitry for determining an availability of thesupplemental set of resources prior to the allocation of thesupplemental set of resources.

Example 43 includes the subject matter of any of Examples 40-42, andwherein the circuitry for determining the availability of thesupplemental set of resources comprises circuitry for querying theoff-premises data center for an availability of the supplemental set ofresources.

Example 44 includes the subject matter of any of Examples 40-43, andwherein the circuitry for querying the off-premises data centercomprises circuitry for querying the off-premises data center with anapplication programming interface associated with the off-premises datacenter.

Example 45 includes the subject matter of any of Examples 40-44, andwherein the circuitry for determining the availability of thesupplemental set of resources comprises circuitry for querying theoff-premises data center for a cost of the supplemental set ofresources.

Example 46 includes the subject matter of any of Examples 40-45, andwherein the off-premises data center is one of a plurality ofoff-premises data centers, and the compute device further comprisesmeans for selecting the off-premises data center for allocation of thesupplemental set of resources as a function of the determinedavailability and cost of the supplemental set of resources.

Example 47 includes the subject matter of any of Examples 40-46, andfurther including circuitry for deallocating, in response to adetermination that the set of resources presently allocated to themanaged node exceeds the resource utilization data, one or more of theresources from the managed node.

Example 48 includes the subject matter of any of Examples 40-47, andwherein the circuitry for deallocating the one or more of the resourcescomprises circuitry for prioritizing deallocation of resources locatedin the off-premises data center over deallocation of resources locatedin the data center in which the compute device is located.

Example 49 includes the subject matter of any of Examples 40-48, andwherein the circuitry for deallocating the one or more of the resourcescomprises circuitry for prioritizing deallocations of resources as afunction of a cost of each resource.

Example 50 includes the subject matter of any of Examples 40-49, andfurther including circuitry for determining whether a cost of notsatisfying a service level agreement associated with the workloadexceeds a cost of allocating the supplemental set of resources; andwherein the means for allocating the supplemental set of resourcescomprises means for allocating, in response to a determination that thatthe cost of not satisfying the service level agreement exceeds the costof allocating the supplemental set of resources, the supplemental set ofresources.

Example 51 includes the subject matter of any of Examples 40-50, andwherein the means for allocating the supplemental set of resourcescomprises circuitry for allocating at least one of acceleratorresources, data storage resources, compute resources, or memoryresources.

1. A server comprising: a node, the node comprising resources, theresources including: a compute resource to execute an application; adata storage resource; an accelerator resource; and a memory resource;and one or more non-transitory machine-readable storage media comprisinga plurality of instructions stored thereon that, in response to beingexecuted, cause the server to: communicate with a remote server via apublic cloud service to allocate a remote resource in the remote serverto the node based on the resources available in the server; and obtainaddress information from the remote server for use by the node to accessthe remote resource as if the remote resource was in the server.
 2. Theserver of claim 1, wherein the server to select the remote resource as afunction of availability and cost.
 3. The server of claim 1, wherein theserver to utilize an application programming interface to communicatewith the remote server in a format specific to the remote server.
 4. Theserver of claim 1, wherein the server to communicate with the remoteresource using a non-volatile memory express over fabric (NVMe-oF) busprotocol.
 5. The server of claim 1, wherein the server to communicatewith the remote server via the public cloud service to deallocate theremote resource in the remote server to the node if the resources to beused in an execution of a workload by the node decrease below theresources available in the server.
 6. The server of claim 1, wherein theremote resource is a remote accelerator resource.
 7. The server of claim1, wherein the remote resource is a remote storage resource.
 8. One ormore non-transitory machine-readable storage media comprising aplurality of instructions stored thereon that, in response to beingexecuted, cause a server to: communicate with a remote server via apublic cloud service to allocate a remote resource in the remote serverto a node based on resources available in the server, the nodecomprising the resources, the resources including a compute resource toexecute an application, a data storage resource, an acceleratorresource, and a memory resource; and obtain address information from theremote server for use by the node to access the remote resource as ifthe remote resource was in the server.
 9. The one or more non-transitorymachine-readable storage media of claim 8, wherein the server to selectthe remote resource as a function of availability and cost.
 10. The oneor more non-transitory machine-readable storage media of claim 8,wherein the server to utilize an application programming interface tocommunicate with the remote server in a format specific to the remoteserver.
 11. The one or more non-transitory machine-readable storagemedia of claim 8, wherein the server to communicate with the remoteresource using a non-volatile memory express over fabric (NVMe-oF) busprotocol.
 12. The one or more non-transitory machine-readable storagemedia of claim 8, wherein the server to communicate with the remoteserver via the public cloud service to deallocate the remote resource inthe remote server to the node if the resources to be used in anexecution of a workload by the node decrease below the resourcesavailable in the server.
 13. The one or more non-transitorymachine-readable storage media of claim 8, wherein the remote resourceis a remote accelerator resource.
 14. The one or more non-transitorymachine-readable storage media of claim 8, wherein the remote resourceis a remote storage resource.
 15. A method comprising: communicating, bya server, with a remote server via a public cloud service to allocate aremote resource in the remote server to a node based on resourcesavailable in the server, the node comprising the resources, theresources including a compute resource to execute an application, a datastorage resource, an accelerator resource and a memory resource; andobtaining, by the server, address information from the remote server foruse by the node to access the remote resource as if the remote resourcewas in the server.
 16. The method of claim 15, wherein the server toselect the remote resource as a function of availability and cost. 17.The method of claim 15, wherein the server to utilize an applicationprogramming interface to communicate with the remote server in a formatspecific to the remote server.
 18. The method of claim 15, wherein theserver to communicate with the remote resource using a non-volatilememory express over fabric (NVMe-oF) bus protocol.
 19. The method ofclaim 15, wherein the server to communicate with the remote server viathe public cloud service to deallocate the remote resource in the remoteserver to the node if the resources to be used in an execution of aworkload by the node decrease below the resources available in theserver.
 20. The method of claim 15, wherein the remote resource is aremote accelerator resource.
 21. The method of claim 15, wherein theremote resource is a remote storage resource.